Abstract

This technical article presents a simulation process to analyze fatigue in electronic parts, particularly in solder joints, on printed circuit boards (PCBs).

There are three core technologies in the process:

• the semi-automatic generation of substitute finite element (FE) models for the electronic devices
• the automatic placement of these FE models into FE models of PCBs
• the automatic generation of solder-joint sub-models whose geometry is calculated using the pin dimensions of the electronic device, the pad dimensions on the PCB, the solder volume, surface tension and gravitation.

By applying a single frequency response analysis to the FE model of an electronic component containing the substitute FE models, and conducting static analyses of all the solder-joint sub-models, the vibrational solder-joint fatigue can be efficiently calculated in FEMFAT spectral, where the section forces in the pins of the electronic devices are mapped onto the sub-models and scaled by a power spectral density to calculate the damage in all solder joints.